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Semiconductor
January 1999
T CT DUC PRO PRODU ETE UTE OL OBS UBSTIT 7612 S CL IBLE L7611, I OSS IC P
CA3440
63kHz, Nanopower, BiMOS Operational Amplifiers
Features
* High Input Resistance . . . . . . . . . . . . . . . . . . . 2T (Typ) * Standby Power at V+ = 5V . . . . . . . . . . . . . 300nW (Typ) * Supply Current, BW, Slew Rate Programmable Using External Resistor * Input Current . . . . . . . . . . . . . . . . . . . . . . . . . 10pA (Typ) * 5V to 15V Supply * Output Drives Typical Bipolar Type Loads
Description
The CA3440 is an integrated circuit operational amplifier that combines the advantages of MOS and bipolar transistors on a single monolithic chip. The CA3440 BiMOS op amp features gate protected PMOS transistors in the input circuit to provide very high input impedance, very low input currents (less than 10pA). This device operates at total supply voltages from 5V to 15V and can be operated over the temperature range from -55oC to 125oC. The virtues are programmability and very low standby power consumption (300nW). This operational amplifier is internally phase compensated to achieve stable operation in the unity gain follower configuration. Terminals are also provided for use in applications requiring input offset voltage nulling. The use of PMOS in the input stage results in common mode input voltage capability down to 0.5V below the negative supply terminals, an important attribute for single supply applications. The output stage uses MOS complementary source follower form which permits moderate load driving capability (10k) at very low standby currents (50nA). The CA3440 has the same 8 lead pinout as the "741" and other industry standard op amps with two exceptions: terminals one and five must be connected to the negative supply or to a potentiometer if nulling is required. Terminal 8 must be programmed through an external resistor returned to the negative supply.
Part Number Information
PART NUMBER (BRAND) CA3440M (3440) TEMP. RANGE (oC) -55 to 125 PACKAGE 8 Ld SOIC PKG. NO. M8.15
Pinout
CA3440 (SOIC) TOP VIEW
V-/OFFSET NULL INV. INPUT NON-INV. INPUT V-
1 2 3 4
8
ISET V+ OUTPUT V-/OFFSET NULL
+
7 6 5
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures. Copyright
(c) Harris Corporation 1999
File Number
1318.5
3-146
CA3440
Absolute Maximum Ratings
Supply Voltage (V+ to V-) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25V Differential Input Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9V DC Input Voltage . . . . . . . . . . . . . . . . . . . . . . (V+ +8V) to (V- -0.5V) Input Current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1mA Output Short Circuit Duration (Note 1) . . . . . . . . . . . . . . . . Indefinite
Thermal Information
Thermal Resistance (Typical, Note 2) JA (oC/W) SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 165 Maximum Junction Temperature (Die). . . . . . . . . . . . . . . . . . . . 175oC Maximum Junction Temperature (Plastic Package) . . . . . . . . 150oC Maximum Storage Temperature Range . . . . . . . . . .-65oC to 150oC Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300oC (SOIC - Lead Tips Only)
Operating Conditions
Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . -55oC to 125oC
CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES: 1. Short circuit may be applied to ground or to either supply. 2. JA is measured with the component mounted on an evaluation PC board in free air.
Electrical Specifications
PARAMETER Input Resistance Input Capacitance Output Resistance Equivalent Input Noise Voltage Short-Circuit Current Source To Opposite Supply Sink Gain Bandwidth Product Slew Rate Transient Response Rise Time Overshoot
Typical Values Intended Only for Design Guidance, VSUPPLY = 5V, RSET = 10M, TA = 25oC SYMBOL RI CI RO eN f = 1kHz f = 10kHz IOM+ IOMfT SR RL = 10k, CL = 100pF tR OS 5.6 10 s % RS = 100 TEST CONDITIONS CA3440 2 3.5 450 110 110 15 4.5 63 0.03 UNITS T pF nV/Hz nV/Hz mA mA kHz V/s
Electrical Specifications
PARAMETER Input Offset Voltage Input Offset Current Input Current Large Signal Voltage Gain
For Equipment Design, At VSUPPLY = 5V; RSET = 10M, TA = 25oC, Unless Otherwise Specified TEST CONDITIONS CA3440 MIN RL = 10k 10 80 TYP 5 2.5 10 100 100 100 80 +3.7 -5.3 32 90 +3.2 -3.2 10 100 4 MAX 10 30 50 320 320 17 170 UNITS mV pA pA kV/V dB V/V dB V V V/V dB V V A W V/oC
SYMBOL |VIO| | IIO | | II | AOL CMRR
Common Mode Rejection Ratio
70
Common Mode Input Voltage Range
VlCR+ VlCRPSRR
+3.5 -5.0 70
Power Supply Rejection Ratio
Max Output Voltage
VOM+ VOMI+ PD VlO/T
+3 -3 -
Supply Current Device Dissipation Input Offset Voltage Temperature Drift
3-147
CA3440 Schematic Diagram
7 V+ QP1 QP2 QP3 ISET 8 QP4 D5 QP5 QP6 Q1
QN10 QN9
Q2 R1 200 R2 30 6 OUTPUT QP12
QP11 D1 INVERTING 2 INPUT NON-INVERTING 3 Q5 Q3 5 1 Q4 Q6 D2 D3 D4
QP7
QP8
30pF
Q7 D6
R3 30 4 V-
Application Information
FET INPUT + 2 BIAS 3 ISET RSET 1 STAGE 1 HIGH GAIN 100dB STAGE 2 BUFFER LOW Z OUTPUT FET/ BIPOLAR OUTPUT +5V 7
CA3440 + 5 4 8 ISET RSET 6
FIGURE 1. NANOPOWER OP AMP (SUPPLY CURRENT PROGRAMMABLE USING RSET), 1pA TYPICAL INPUT BIAS CURRENT, 4.0V TO 15V SUPPLY
FIGURE 2. NANOPOWER OP AMP (USABLE STANDBY POWER vs PROGRAMMING RESISTOR RSET)
As RSET is increased, ISET and the standby power decrease while the BW/SR also decrease. Operating at a +5V single supply, the CA3440 exhibits the following characteristics:
RSET 1M 10M 100M 1G STANDBY POWER 250W 25W 2.5W 250nW BW 164kHz 27kHz 2.6kHz 78kHz SR 0.17V/s 0.017V/s 0.0017V/s 0.00017V/s
The CA3440 is pin compatible with the 741 except that pins 1 and 5 (typical negative nulling pins) must be connected either directly to pin 4 or to a negative nulling potentiometer. In addition, pin 8, the ISET terminal, must be returned to either ground or -V via RSET.
3-148
CA3440 Typical Applications
+9V 22M 4.7M 2 2.2M INPUT 500pF 2F + 4.7M 1, 2 10 7 4, 5 DIODES FROM CA3086 1 3 7 12M 1.2M 22M 8 +5V 7
CA3440 + 5 4 8 10M 9, 11 6 OUTPUT 1.2M
2
CA3440 6 4 2.35V AT 200A + 1 5
3 6, 8
RIN >20M Standby Power = 90W Gain = 20dB BW: 20Hz to 3kHz SR = 0.016V/s
3 13
FIGURE 3. HIGH INPUT IMPEDANCE AMPLIFIER
FIGURE 4. MICROPOWER BANDGAP REFERENCE
Typical Performance Curves
INPUT AND OUTPUT VOLTAGE EXCURSIONS FROM THE POSITIVE AND NEGATIVE SUPPLY VOLTAGE (V) 2.0 1.6 1.2 0.8 0.4 0 = (V+ OR V-) 0 -0.4 -0.8 -1.2 -1.6 -2.0 0 5 10 SUPPLY VOLTAGE (V) 15 VICRVICR+ VO+ 1 10 100 1000 SUPPLY CURRENT (nA) 10,000 VOTA = 25oC RL = 100k 1000 TA = 25oC VS = 5V
SET CURRENT (nA)
100
10
FIGURE 5. OUTPUT VOLTAGE SWING AND COMMON MODE INPUT VOLTAGE RANGE vs SUPPLY VOLTAGE
FIGURE 6. SET CURRENT vs SUPPLY CURRENT
3-149
CA3440 Typical Performance Curves
12 TOTAL HARMONIC DISTORTION (%) 10 8 6 1kHz 4 -5V 2 0 0.1F
(Continued)
0 -5V 1 2 3 10M +5V 8 7 0.1 F OUTPUT VOLTAGE FROM V+ RAIL (V) TA = 25oC VS = 5V ISET = 1A 1k
TA = 25oC V- = 0V RSET = 1G
-2
+
CA3440 4 5
6 100 k
-4 V+ = 5V -6
-8
V+ = 10V V+ = 12V 0.1 1 10 100
0
2
4
6
8
10
12
14
16
18
-10 0.01
LOAD RESISTANCE (k)
LOAD SOURCING CURRENT (mA)
FIGURE 7. TOTAL HARMONIC DISTORTION vs LOAD RESISTANCE
FIGURE 8. OUTPUT VOLTAGE vs SOURCING LOAD CURRENT
OUTPUT VOLTAGE FROM V- RAIL (V)
10 8 6 4 2
TA = 25oC V+ = 0V RSET = 1G V- = -12V V- = -10V
EQUIVALENT INPUT NOISE VOLTAGE (nVHz)
12
104 TA = 25oC RSET = 10M
103 VS = 2.5V VS = 5V VS = 10V 102
V- = -5V
0 0.01
0.1 1 LOAD SINKING CURRENT (mA)
10
101 101
102
103
104
FREQUENCY (Hz)
FIGURE 9. OUTPUT VOLTAGE vs SINKING LOAD CURRENT
FIGURE 10. INPUT NOISE VOLTAGE vs FREQUENCY
106
106
105 SLEW RATE (V/s) 1 101 102 103 104 105 BANDWIDTH (Hz)
105
104
104
103
102
103
101
102 1 101 102 103 SET CURRENT (nA) 104 105
SET CURRENT (nA)
FIGURE 11. BANDWIDTH vs SET CURRENT
FIGURE 12. SLEW RATE vs SET CURRENT
3-150

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